ChaOS

Raspberry Pi         i86         ebc         ia64         Linux         Android         2012 site   

Currently Beta-testing ChaOS server mirror platform

If links are be broken or unauthorized (Error 401) - Please come back another time

ChaOS is an organic bootstrapped self-compiling operating system for Intel/AMD platforms, in continuous development since 1995. Home-grown compilers provide independence from main-stream operating systems. The key difference compared with mainstream development is a C compiler, with native assembler embedded in the operating system image, allowing for quantum leaps in development without phase errors.

ChaOS makes no attempt to chase the leading-edge of technology, instead waiting for de-facto standards to emerge. Over time this has produced a capable office platform based around low-cost recycled hardware.

Recently being used to develop cross compilers for Arduino, ARM and IA64 (Itanium) architectures focussing on bootable "baremetal" binaries.

Follow the Pi project: here or send a message

March 2024 Added beast Dell M6800 i7-4910MQ FullHD laptop to development lab, with customary time spent coding for its idiosyncracies. One of which, per Intel 4th Generation Mobile Family Specification Update is HSM184: System May Hang Under Complex Conditions!. Managed to reliably produce this fault, and reliably fix it without lowering processor clock speed.

August 2023 All of pi/chaos now compiled as arm32 code rather than Thumb2, runs fine on Pi3, but so far unable to detect the root USB port0 on Pi4 legacy USB controller.

July 2023 Pushing on with AMD64/Intel64 mode development on the i86/chaos platform. Added native 64-bit app launch. Added Raspberry Pi4 (Arm64-capable) to development platform lab. Improving armc4 compiler to produce pure Arm32 output for the Pi4 due to problems with boot (traced to differences in Pi4 irqcntrl, peripheral base address and mmuinit). Small baremetal Pi4 OS created with framebuffer and miniuart running, feeding back into the compiler revision.

June 2023 Created Linux crsd Curl Relay Server daemon, providing ChaOS with the means to manage https:// connections. Added code to email invoices and statements from njob via Curl Relay Server.

January 2023 Modify {njob} to produce .json packet for HMRC MTD VAT Return submission. (Passed to custom Linux application for submission to HMRC).

December 2022 Stretching Giganumber library, evaluating mathematical constants to ridiculous precision.

November 2022 Giganumber library. Revision of old lmath library, using new struct GN with dword count, sign and decimal exponent besides the UL [dwords] array holding value. Large number maths is easier if sign is separate, rather than in the top bit of the value. Negative values are then only required for combining opposite-signed values by addition or subtraction.

October 2022 Compiler and inline assembler revision. Expanded x86 assembly instruction database from cc7 compiler moved into cc, inbuilt OS compiler now has SSE/SSE2 instructions. Compiler switches /stk16 (16-byte local variable alignment) and /stk8 (64-bit stack argument granularity) woven into cc. /stk16 facilitates SSE2 assembly language routines using stack temporaries which are 128-bit aligned. /stk8 produces the same argument alignment on the stack for 32-bit and 64-bit functions. This is primarily to allow passing of 64-bit pointers between modes, but has the side-effect that vararg lists are mode-independent. 32-bit code generated by /stk8 is not with compatible ChaOS v1.03. Created bootstrapped ChaOS v1.04 which has /stk8 on by default.

ChaOS compilers use a non-ANSI # in 64-bit pointer declarations. Compilers can generate different code for the usual * operator, according to actual pointer type.

Experimenting now with RDFSBASE/WRFSBASE inlined for 64-bit pointers, writing top 32 bits of pointer to FS base and using FS: segment override (and REX.X if necessary) for the subsequent indirect memory access. It is important to remember here that the CPU ignores the top 32 bits of a 64-bit base register so long as the canonical bits are all the same. C * operator in 64-bit mode can access the whole 64-bit address space using this trick. There seem to be no page faults when using a FS: override, memory addresses just wrap around a convenient boundary such as 16Gb, 32Gb, 64Gb depending on the machine. CPU clock cycle consumption is heavy, several hundred clock cycles for first WRFSBASE instruction; however writing the same base address to FS consumes just a couple of dozen clock cycles, less in fact than the indirect memory access itself. Therefore this is a viable model for boiler-plate code behind the construction of tasks and VMs.

In the course of developing the memory area beyond 4Gb, code and data blocks will need to be moved from below 4Gb in the form of file uploads etc. For this, only one WRFSBASE is needed af the start of a memcpy function using an assembly language FS: destination override. Memory blocks above 4Gb can be moved around using WRFSBASE and WRGSBASE, with FS: and GS: overrides for source and destination.

August 2022 System message queue code overhauled, now using a set of hardware-style ring buffers, one for each CPU. Added ap,proc members to WND struct, to provide for placement of WND messages in different queues, to share workload. Added aphalt() function to halt APs when MSGQ is empty, along with kickstart() function which allows one CPU to bring another out of halted state using inter-processor interrupt (IPI). Significant steps towards symmetric CPU operation.

June-July 2022 Improvements to font engine, using supersampling of specimen bitmaps. Add extension to ChaOS WND system for windows on second screen. Building new WND concept around general-purpose graphics context (GCTX), and streams of content rather than plaintext buffers. Added PDF invoice output option to CTPP order-processing system (NJOB on ChaOS platform).

April-May 2022 Improving TrueType font rendering, ironing out issues such as overlapping and self-intersecting paths, composite glyph issues such as nesting and scaling.

March 2022 Delving once again into TrueType font rendering. Advanced further than my 2014 attempt, now have a fast and reliable fillpath algorithm to render glyphs at output device resolution. The method is suitable for filling or clipping to any closed vector path.

February 2022 Completing office refurbishment, retiring parallel port printer connections for invoices, labels, orders and production paperwork in favour of network printing. Tweaked ChaOS prnsrv to fire print jobs over network using TCP. Added Canon irC2880 A3 colour printer/scanner to office network.

January 2022 Revisiting i86/chaos SIMD support, added setups for AVX if processor-capable. Development compiler ccx providing 16-byte stack alignment for SIMD types on CPU stack.

December 2021 Overhauling i86/chaos SMP support. MAXCPUS increased to 64. Added global APINFOTBL so all CPUs can see what the other CPUs are up to. ChaOS compiler mutex function modifier improved and working as envisaged in 2011, now capable of generating implicit and explicit spinlocks for critical code sections. Added killAP function to halt wayward AP, clean up heap allocations and release any spinlocks held. ChaOS now using mutex to serialise access to system memory allocator.

July August 2021 Crafting Chaos NetXtreme and HP Smart Array drivers, and ChaOS compiler to support dynamic-linking of apps into complex nested structures created by compiling selected chunks of Linux GPL code. Added 64-bit LBA support for HP Smart Array to explore 2Tb+ RAID Logical Volumes in various configurations. Snooping live Windows Server NTFS partition on SAN via second i/o controller and read-only ChaOS filesystem driver {ntfs.drv}. Discovered NTFS directory bloat caused by 8dot3 filenames. Multicasting through VPN routers between ChaOS <--> Win 10 VB.NET/C# on .NET Framework and .Net Core.

May June 2021 Implemented x86 ChaOS scratch drivers for NetXtreme and HP Smart Array P410i. Remote dl380 g7 server reboot via VPN and ChaOS remote desktop down to 19 seconds. Uptime for ChaOS on Raspberry Pi running a bank of relays to control power to remote servers via VPN now approaching 3000 hours.

April May 2021 Working on SAN storage via LSI MPT adapters, MSI/MSI-X interrupt vectoring, and revising PCI scan to cope with complexities of c7000 blade server enclosure.

January - March 2021 Reinstate 32-bit support in i86 ChaOS boot image. Revise deflate algorithm to commercial-grade compression. Add functionality to disk partitioning utility to support creating/cloning/shifting up to 40 GPT partitions per hard drive, with hot partition mount/demount on keystroke.

January - December 2020 ARM/Raspberry Pi compiler at {armc4}, pi/chaos has FAT32 filesystem, simple text editor, nascent network stack with DHCP/NTP client, supporting a UDP remote console. i86/chaos revised to support UDP remote desktop including remote debug/compile/reboot.

July 2019 - armc1 Revisiting my compiler for ARM/Raspberry Pi from 4 years ago, with a view to adding ARM architecture support to {vc2}.

January - June 2019 - vc2 Mainly developing this new multi-architecture ChaOS compiler in parallel across x64 and IA64 platforms, spilling inevitably into support for 128-bit integer and floating point arithmetic formats.

December 2018 - cc Significant changes to ChaOS embedded compiler to properly support 64-bit integers as structure members and function arguments. (These data types were added to simplify structure definitions for UEFI partitions, and prepare the ChaOS filesystem for files larger than 4Gb, and drives larger than 2Tb). Up to this point these entities have been compilable, but silently cast to their 32-bit equivalents. Assembly workarounds are used for programmatic access to the upper 32 bits. I have removed the automatic casting, so cc now throws errors until the affected expressions are explicitly cast back to 32-bit. Hundreds of source code adjustments have already been made, thankfully without breaking the operating system and embedded compiler. These changes means ChaOS now supports long long ints for load and store, as function arguments on the 32-bit stack, and as function return values in register pair edx:eax. The support for these 64-bit integers is, although limited, now clearly defined. I may yet graft in support for 64-bit arithmetic, because the two-register model will upscale to my x64 compilers for 128-bit integer operations.

September/October/November 2018 - ia64 Unbelievably acquired Itanium 9300 i2 (Tuwkila) and Itanium 9500 i4 (Poulson) flagship blade servers for throwaway money. All the side-issues relating to booting an Itanium server in the c7000 blade environment have been successfully overcome. My i4 bl870c conjoined blade has three out of four processors present, 48 Itanium CPU threads in one computing unit. I now have the broadest range of working Itanium testbeds going forward.

August 2018 - ia64/x64 Latest Itanium testbed is rx2660 server with twin 1.6GHz dual core CPUs, 8 threads in total. Current IA64 project is a pe32+ .efi image built around a debug_donkey with single-step, IA64 disassembler and register view. In parallel is x64 pe32+ .efi image, also with a debug_donkey, disassembler and single-step.. Steadily adding to a shared library of functions which compile for either architecture, exploring the EFI network interfaces. Very interested to see enthusiasts are compiling TianoCore for ARM, a platform which could be added to this thread.

May 2017 - {vc} vc=virtual compiler. Moving quickly on from {itc1} to separate the CPU from the C compiler, by providing a separate backed/inline assembler for each architecture supported. C compiler produces p-codes which are translated by an architecture-specific function and passed to the relevant assembler. Currently producing pe32+ .efi images for the IA64 project and for x64 in embryo form.

April 2017 - {itc1} Port of {ebc1} to compile for IA64 (Itanium) platforms. See here. I found two HP Integrity machines, one rx2600 and one rx2620 on eBay for fifty quid each. The Itanium is not the sort of processor you take home to meet your parents, it is a supermodel. Shame it is coming to end-of-life but no doubt it lives on beneath the Intel x86-64 microcode.

March 2017 - {ebc1} Port of {armc1} to produce EFI Byte Code, for the EFI pre-boot VM (provided it is supported in firmware). Producing small test programs which run unchanged on x86-64 and IA64 platform. Looking for IA32 and ARM EFI testbeds.

November 2015 - {armc1} Stumbled across the fact that Raspberry Pi runs (basic) Thumb code, began producing binaries for this platform.

So ChaOS is now being ported to Raspberry Pi. My compiler accepts simple HTML files as sources, for easy viewing over the internet.

May 2015 - {armc1} started, the ChaOS compiler for ARM platforms, targeting Thumb mode on Arduino Due and STM Nucleo flash microcontrollers.